The present disclosure herein relates to a three dimensional semiconductor device and a method of fabricating the same.
Higher integration of semiconductor devices is required to satisfy consumer demands for superior performance and inexpensive prices. In the case of semiconductor memory devices, since their integration is an important factor in determining product prices, increased integration is especially required. In the case of typical two-dimensional or planar semiconductor memory devices, since their integration is mainly determined by the area occupied by a unit memory cell, integration is greatly influenced by the level of a fine pattern forming technology. However, the extremely expensive semiconductor equipment needed to increase pattern fineness sets a practical limitation on increasing integration for two-dimensional or planar semiconductor devices.
To overcome such a limitation, three dimensional memory semiconductor memory devices having three-dimensionally arranged memory cells have been proposed. However, in order to mass-produce three dimensional semiconductor devices, a process technology that provides a lower manufacturing cost per bit than two-dimensional memory devices while maintaining or exceeding their level of reliability is required.